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Student Assistant / Intern – Analog Front-Ends
The department for »Integrated Circuits and Systems « (ICS) has been successful in developing complex mixed-signal ASICs for more than 25 years. The area of focus covers a wide range of applications in the field of audio, communications, automotive, etc. In addition, the department is increasingly broadening its focus to offer accelerator solutions in the field of neuromorphic computing.
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You are interested in new technical topics and want to work in the field of mixed-signal ASICs?
Then have a look at our offer![/b]
What you will do
• IC design: You design, simulate and/or do the layout of analog and mixed-signal circuits on nanometer processes using mainly CADENCE tools.
• System design: You design and analyze circuit architectures and determine system performance using system simulation and high-level modeling. Besides that you derive block specifications from a system specification.
• Mixed-signal design: You are responsible for mixed-signal-simulation and -verification. Moreover you support the modelling of analog and digital blocks using VERILOG, VERILOG-A or VERILOG-AMS.
Together with your supervisor, you can individually determine which field of activity you would like to take on.
What you bring to the table
• You currently study Electrical/Electronic Engineering and/or Information Technology or equivalent in a master program
• You have knowledge in analog/mixed-signal circuit design
• You have good spoken and written English skills
• Your experience on CADENCE’s tools is a plus
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What you can expect[/color]
• Flexible working hours
• Open and friendly team work
• Exciting seminars and events
• Networking with scientists
• Active contribution in applied research
• Interesting an innovative projects
• Mentoring program »josephine©« for talented female students
Weekly working hours are determined by agreement. You can start from now on (as a student assistant from 10 to 20 hours a week or as an intern for a period of at least three months). You can reduce your hours before exams and increase them during semester breaks. You can flexibly determine the working days. You can do your Master Thesis with us. After your studies, you have the option of working with us full or part time.
We would be happy to offer you the opportunity to write a master’s thesis in cooperation with us in the above-mentioned subject area. The thesis will be assigned and carried out in accordance with the rules of your university. For this reason, please discuss the thesis with a professor who can advise you over the course of the project.
We value and promote the diversity of our employees’ skills and therefore welcome all applications - regardless of age, gender, nationality, ethnic and social origin, religion, ideology, disability, sexual orientation and identity.
Interested?
Apply online now (PDF: cover letter, CV, transcripts). We look forward to getting to know you!
Fraunhofer-Institute for Integrated Circuits IIS
www.iis.fraunhofer.de/en
Requisition Number: 23725 Application Deadline: None Location: Erlangen